On Tue, 26 Nov 2013 15:10:22 -0800 Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> wrote: > On Mon, 11 Nov 2013 10:23:24 +0100 > Daniel Vetter <daniel@xxxxxxxx> wrote: > > > On Wed, Nov 06, 2013 at 12:51:05PM +0200, Ville Syrjälä wrote: > > > On Wed, Nov 06, 2013 at 02:36:35PM +0800, Chon Ming Lee wrote: > > > > vlv_dpio_read/write should be describe more in PHY centric instead of > > > > display controller centric. > > > > Create a enum dpio_channel for channel index and enum dpio_phy for PHY > > > > index. This should better to gather for upcoming platform. > > > > > > > > v2: Rebase the code based on > > > > drm/i915/vlv: Fix typo in the DPIO register define. > > > > > > > > v3: Rename vlv_phy to dpio_phy_iosf_port and define additional macro > > > > DPIO_PHY, and remove unrelated change. (Ville) > > > > > > > > Suggested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Signed-off-by: Chon Ming Lee <chon.ming.lee@xxxxxxxxx> > > > > > > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Queued for -next, thanks for the patch. > > Looks like this one gives me bogus DPIO values at least some of the > time. Reverting to using 0x12 as the port ID seems to get me valid > values back... Ah looks like the init_dpio happens too late for the mode state readout. I'll post a patch to move it up. -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
