From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> A while back I got confused by the GT fault register defintions, and proceeded to do something about. Here are the results. I also proceeded to convert the whole intel_gt_regs.h to REG_BIT()/etc. I've included some of that here as well (EU/slice fuse and timestamp frequency stuff). I'll hang on to the rest for now to keep the amount of patches in a manageable level. Ville Syrjälä (12): drm/i915: Bump RING_FAULT engine ID bits drm/i915: Relocate RING_FAULT bits drm/i915: Use REG_BIT() & co. for ring fault registers drm/i915: Document which RING_FAULT bits apply to which platforms drm/i915: Introduce RING_FAULT_VADDR_MASK drm/i915: Extract gen8_report_fault() drm/i915: Use REG_BIT() & co. for CHV EU/slice fuse bits drm/i915: Reoder CHV EU/slice fuse bits drm/i915: Use REG_BIT() & co. for BDW+ EU/slice fuse bits drm/i915: Reoder BDW+ EU/slice fuse bits drm/i915: Use REG_BIT() & co. for gen9+ timestamp freq registers drm/i915: Reoder gen9+ timestamp freq register bits drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 +- drivers/gpu/drm/i915/gt/intel_gt.c | 89 +++++------- .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 10 +- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 5 +- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 136 ++++++++---------- drivers/gpu/drm/i915/gt/intel_sseu.c | 56 ++++---- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 7 +- 7 files changed, 135 insertions(+), 173 deletions(-) -- 2.45.3
