On Wed, Nov 06, 2013 at 11:02:22PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > No longer needed since the LRIs do the work. Shouldn't this be part of previous patch? > > v2: Rebased due to hunk getting dropped from an ealier patch > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 23 ----------------------- > 1 file changed, 23 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index dc65bb4..3f600ba 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -187,26 +187,6 @@ static bool g4x_fbc_enabled(struct drm_device *dev) > return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN; > } > > -static void sandybridge_blit_fbc_update(struct drm_device *dev) > -{ > - struct drm_i915_private *dev_priv = dev->dev_private; > - u32 blt_ecoskpd; > - > - /* Make sure blitter notifies FBC of writes */ > - gen6_gt_force_wake_get(dev_priv); > - blt_ecoskpd = I915_READ(GEN6_BLITTER_ECOSKPD); > - blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY << > - GEN6_BLITTER_LOCK_SHIFT; > - I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); > - blt_ecoskpd |= GEN6_BLITTER_FBC_NOTIFY; > - I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); > - blt_ecoskpd &= ~(GEN6_BLITTER_FBC_NOTIFY << > - GEN6_BLITTER_LOCK_SHIFT); > - I915_WRITE(GEN6_BLITTER_ECOSKPD, blt_ecoskpd); > - POSTING_READ(GEN6_BLITTER_ECOSKPD); > - gen6_gt_force_wake_put(dev_priv); > -} > - > static void ironlake_enable_fbc(struct drm_crtc *crtc, > struct drm_framebuffer *fb, > unsigned long interval) > @@ -240,7 +220,6 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, > I915_WRITE(SNB_DPFC_CTL_SA, > SNB_CPU_FENCE_ENABLE | obj->fence_reg); > I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); > - sandybridge_blit_fbc_update(dev); > } > > DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane)); > @@ -297,8 +276,6 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, > SNB_CPU_FENCE_ENABLE | obj->fence_reg); > I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y); > > - sandybridge_blit_fbc_update(dev); > - > DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); > } > > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx