On Wed, Nov 20, 2013 at 10:18 AM, Thomas Richter <thor@xxxxxxxxxxxxxxxxx> wrote: >> I think we ned to split out the gen2/3 single/dual pipe watermark code a >> >> bit better from everything else. A bugfix for i830M shouldn't really >> affect snb ;-) > > > Actually, the fun part is that it does not because all the lower limits are > zero for all other architectures. What I've meant to say is that I want to split up the watermark code more anyway, so that there's no need to fill in the 0 all over the place where we don't care one bit. I.e. all the gen4+ platforms. >> I've pushed out my current (and rather broken) wip branch with my idea on >> the take to >> >> http://cgit.freedesktop.org/~danvet/drm/log/?h=for-thomas > > > Could you please help me here how to apply it? I'm not very experienced with > git, and it does not seem to fit to the sources of > intel_pm.c I have. Do I first need to instruct git to download another > branch? I'm currently at drm-intel-nightly. It's more just to read through the patches for ideas. Atm the branch doesn't even compile - I'll try to clean it up and beat it into shape in the next few days. The core idea is to have a minimal wm of 4 (lowest burst setting) and then set the actual burst setting to the watermark rounded down to the next multiple of 4, up to the recommended value in Bspec (which is 16 fifo cachelines). But I've fumbled the job a bit and broke a few things ;-) -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
