Snapshot 2.99.906 (2013-11-13) ============================== Several stability fixes required after the recent tweaking of the core mechanics to handle the updated TearFree and attempting to make static analyzers happy. * Fix damage handling when rendering to a partially damaged GPU surface. Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Use asprintf() instead of sprintf() Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70835 * Improve accounting for fence overallocation on older gen2/3, and improve the tiling mechanism to fit into the same aperture constraints https://bugs.freedesktop.org/show_bug.cgi?id=70924 * Add an extra GPU flush on Sandybridge to fix some rare font corruption * Rasterise lines through all clip boxes https://bugs.freedesktop.org/show_bug.cgi?id=70802 * Fix regression from stricter handling of failures to move a GC to the GPU Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=71415 * Fix various fail along the memcpy_xor paths, including inadequate error handling and integer overflow https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Fix outside-of-target stipple uploads https://bugs.launchpad.net/bugs/1247785 * Fix clip detection for long glyphs Incomplete bug fix (causing a regression) in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Fix VSync for the render engine (Xv) on Haswell https://bugs.freedesktop.org/show_bug.cgi?id=70527 Complete list of changes since 2.99.905 --------------------------------------- Chris Wilson (113): sna: Reset bo after allocation failure during wait-for-shadow man: Describe the TearFree option Revert "sna: Remove the move-to-gpu shortcircuiting for partial GPU, no CPU damage" sna: Remove the move-to-gpu shortcircuiting for partial GPU, no CPU damage sna: Fix canonical mode name to correctly use asprintf sna: Do not apply drawable offsets to DamageRegionAppend man: State the negative aspects of TearFree man: Mention the new default accel sna/io: Wrap the XOR upload paths with SIGBUS handling sna/io: Propagate failure to XOR uploads sna: Add a line of DBG for when we discard uploads into CPU bo sna: Fix overallocation of fences for BLT commands (gen2/3) sna: Remove stale mappings when replacing GPU bo sna: Don't assert indirect GPU state sna: Trim usuable fenced aperture by unfenced usage sna: Handle transient TearFree flip failures sna: Fallthrough to opportunistic flushing after aperture checks sna: Use page-count for mappable aperture size sna: Leave extra room in the mappable aperture for fence alignment sna: Defer opportunistic flush if all bo are current on the GPU sna: Account for extra guard pages around snooped BO in aperture checks sna: And be pessimistic when checking aperture limits sna: Tidy RegionNil checks sna: Quieten a couple of valgrind warnings about unknown ioctls sna: Try harder to complete writes sna: Don't attempt to move the GC back to the GPU before it is moved away sna: asserts bitmap uploads are correct sna: Check for retired upload buffers after checking for an idle ring sna: Perform an explicit retire for old active upload buffers sna: Always run the retire_buffers during ring_idle sna: Handle deferred retiring of active-buffers sna: Remove an overzealous assert sna: Fix assertion checks for fake flushing requests sna/gen7: Refactor BYT vsync using IVB routines sna: Wrap access of upload buffers with sigtrap sna: Check for wedged after submitting sna: Queue retirement when placing a BO on the deferred flushing list sna: Detect and handle mi recursion sna: Assert that the batch is in the correct mode prior to inserting BLT commands Revert "sna: Detect and handle mi recursion" sna: Allow limited recursion within sigtrapped routines sna: Tweak deletion of used buffers sna/gen6: Tweak flush around CC state changes sna/gen7: Flush render cache when changing CC state sna: Scale uses of aperture_mappable by PAGE_SIZE sna/gen7: Undo overzealous flushing sna: Process all clip boxes when rastering segments sna: Guard the replace-with-xor fallback path sna: Fallback when wedged and trying to use the BLT copy routines Prepare for changes in the BLT unit on future generations sna: Tweak estimate of maximum usable aperture for strict fencing sna: Add some more asserts around inactive VMA lists sna: Jump to the right escape target when bypassing a self-copy sna: Eliminate the redundancy between is_mappable/can_map sna: Discard bo->exec when unwinding a glyph no-op sna: Wrap staging buffer access with sigtrap handler sna: Use fast-path target placement if we are also IGNORE_CPU sna: Use the unoptimized pwrite for general buffers sna: Rename the two variants of pwrite so very relative dangers are obvious sna: Only destroy the old GPU after successfully replacing it sna: Remove the replace indirection prior to performing write_boxes sna: Update DBG formats for larger BO offset integers sna: Only use the simple stipple upload path if wholly contained sna: Apply the BLT source offset for individual copies sna: Promote uint16_t to a full int to avoid overflow in computing w*h in memcpy_xor sna: s/active/busy/ to silence compiler warning sna: Check for loss of state after setting up a fill BLT op test sna: Be move conservative with tiling sizes for older fenced gen sna: Use an inplace exchange for large untiled BO sna: Clear snoop flag after converting from a CPU bo sna: Submit execution on the bo before changing its caching status sna: Mark partial move_area_to_gpu with MOVE_READ on promotion to move_to_gpu sna: Trim the overestimate of required aperture space for fence alignment sna: Only operate inplace if no existing CPU damage for a read sna: Be more pessimistic for tiling sizes on older gen sna: Clear the execlist if we completely unwind a batch after using 8x8 tiling sna: Move initialisation of loop counter to common code sna: Clear the execlist if we completely unwind a batch after using 8x8 tiling sna: Fixup unwind checks for future BLT commands sna: Fences are power-of-two sizes sna: Trim create flags if tiled sizes are too large sna: Use tiling BLT fallback for BLT composite operations sna: Add a DBG breadcrumb to kgem_bo_convert_to_gpu() sna: Remove erroneous assertion from sna_tiling_blt_composite sna: Always copy from the tile source sna/gen7: Request secure batches for Haswell vsync sna: Only assert that the bo is small enough to be mmapped sna: Skip an unmappable linear bo when searching through a cache for a GTT mapping sna: Always schedule upload buffers for retirement after use intel-virtual-output: Add some DBG for bad_visual() intel-virtual-output: Check for pending events before skipping draw intel-virtual-output: Perform an explicit sync intel-virtual-output: Add DBG for the latest XSync intel-virtual-output: Disable event tracking after a failure intel-virtual-output: Tighten bad_visual() checks intel-virtual-output: Fix forced synchronisation of clones intel-virtual-output: Only track the most recent visibility status of the cursor sna: Assert that we do setup the gc->pCompositeClip upon ValidateGC intel-virtual-output: Do not hide the cursor on the local/source display intel-virtual-output: Avoid the infinite loop around XPending sna: Add a couple more asserts to track a potential NULL gc->pCompositeClip sna: Assert that gc->funcs is never set to NULL intel-virtual-output: Fix cut'n'paste DBG error intel-virtual-output: Fix format specifiers for Visual DBG xvmc: Handle allocation failure around batch submission sna: Apply drawable offset to glyph bbox prior to checking for clipping sna: Factor available memory into available aperture estimation Add identification strings for new Atoms intel-virtual-output: Manually adjust screen size sna: Discard cached upload proxy when writing to the pixmap via the CPU Bump experimental ioctl command numbers 2.99.906 snapshot Rémi Cardona (1): configure: Use proper variables set by PKG_CHECK_MODULES git tag: 2.99.906 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.99.906.tar.bz2 MD5: 877a95ffb360d6154f9327a9e1e9a196 xf86-video-intel-2.99.906.tar.bz2 SHA1: fc4dd1f43a93487e2a2aff7b7cba243da03ffa09 xf86-video-intel-2.99.906.tar.bz2 SHA256: 2d9343ce0257f82612ab6cb4a18ebfdcb2bc76a226d8442b2f7f210cc4f63cd6 xf86-video-intel-2.99.906.tar.bz2 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.99.906.tar.gz MD5: 8e366ba6166e805e20179fba2e8f1fb6 xf86-video-intel-2.99.906.tar.gz SHA1: 05ac2dcb711a45d9b7435194befe0fc5da437672 xf86-video-intel-2.99.906.tar.gz SHA256: a1a1100fdcfbeb01172ac7703bae6543f44992beaa43ce45e33697f0cc43321d xf86-video-intel-2.99.906.tar.gz -- Chris Wilson, Intel Open Source Technology Centre
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