On Tue, 12 Nov 2013, Daniel Vetter <daniel@xxxxxxxx> wrote: > On Tue, Nov 12, 2013 at 09:37:52AM -0700, Todd Previte wrote: >> On 11/12/13 8:10 AM, Jani Nikula wrote: >> >We used to put the local sink and any downstream sinks to power down >> >mode at disable or dpms off using the DPCD SET_POWER register, until >> >this was broken by >> > >> >commit e8cb455876fa8f67c6aba394d0a14b697bf04cc3 >> >Author: Daniel Vetter <daniel.vetter@xxxxxxxx> >> >Date: Sun Jul 1 13:05:48 2012 +0200 >> > >> > drm/i915/dp: convert to encoder disable/enable >> > >> >Fix it. >> > >> >Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> >> >--- >> > drivers/gpu/drm/i915/intel_dp.c | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> >diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c >> >index dbe4840..cbf33be 100644 >> >--- a/drivers/gpu/drm/i915/intel_dp.c >> >+++ b/drivers/gpu/drm/i915/intel_dp.c >> >@@ -1774,7 +1774,7 @@ static void intel_disable_dp(struct intel_encoder *encoder) >> > * ensure that we have vdd while we switch off the panel. */ >> > ironlake_edp_panel_vdd_on(intel_dp); >> > ironlake_edp_backlight_off(intel_dp); >> >- intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); >> >+ intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); >> > ironlake_edp_panel_off(intel_dp); >> > >> > /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */ >> >> Reviewed-by: Todd Previte <tprevite@xxxxxxxxx> > > Picked up for -fixes, thanks for the patch. Atm without a cc: stable, but > I'll add that if we get a tested-by from a bug report. Might be worth a > shot to haggle this by some dp bugzillas ... I'm really not sure what the impact might be other than a potential power regression fix, and I presume a smart sink would save power when we put the main link down. The DP spec is a bit light on this. For eDP we cut the power anyway, so perhaps the impact is on external displays only, and people might not even pay so much attention to their power consumption. I guess I could have put that in the commit message too, but oh well. BR, Jani. -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
