On Thu, Oct 31, 2024 at 11:27:05AM +0200, Jani Nikula wrote:
> On Thu, 31 Oct 2024, Raag Jadav <raag.jadav@xxxxxxxxx> wrote:
> > On Wed, Oct 30, 2024 at 08:39:31PM +0200, Jani Nikula wrote:
> > > On Wed, 30 Oct 2024, Raag Jadav <raag.jadav@xxxxxxxxx> wrote:
> > > > G8 power state entry is disabled due to a limitation on DG2, so we
> > > > enable it from driver with Wa_14022698537. For now we enable it for
> > > > all DG2 devices with the exception of a few, for which, we enable
> > > > only when paired with whitelisted CPU models. This works with Native
> > > > ASMP and reduces idle power consumption.
> >
> > ...
> >
> > > > +/* Wa_14022698537:dg2 */
> > > > +static void i915_enable_g8(struct drm_i915_private *i915)
> > > > +{
> > > > + if (IS_DG2(i915)) {
> > > > + if (IS_DG2_D(i915) && !intel_match_g8_cpu())
> > > > + return;
> > >
> > > You don't need to check for DG2 twice.
> >
> > My understanding is that DG2_D is a subset of DG2.
>
> Sorry, I misread the code. *facepalm*.
Yeah, we definitely need the coffee :D
Raag
