On Thu, Nov 07, 2013 at 03:23:27PM +0800, Chon Ming Lee wrote: > The max frequency reporting is not correct. But there is already an existing > valleyview_rps_max_freq and valleyview_rps_min_freq to get the > frequency. Use that for i915_cur_delayinfo. > > Signed-off-by: Chon Ming Lee <chon.ming.lee@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- > 1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index cae3e9c..5254d95 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -972,11 +972,11 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) > seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); > seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq); > > - val = vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1); > + val = valleyview_rps_max_freq(dev_priv); I'm not actually sure about the NC freq stuff. Not sure where that is even documented. The punit turbo HAS tells us to read the max and guaranteed freqs from PUNIT_FUSE_BUS1. Maybe we should actually change valleyview_rps_max_freq() and valleyview_rps_rpe_freq() to read them from PUNIT_FUSE_BUS1? > seq_printf(m, "max GPU freq: %d MHz\n", > vlv_gpu_freq(dev_priv->mem_freq, val)); > > - val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM); > + val = valleyview_rps_min_freq(dev_priv); This one is the same register, just with masking, so this change looks OK. And it matches the punit turbo HAS. > seq_printf(m, "min GPU freq: %d MHz\n", > vlv_gpu_freq(dev_priv->mem_freq, val)); > > -- > 1.7.7.6 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
