> -----Original Message----- > From: Nautiyal, Ankit K <ankit.k.nautiyal@xxxxxxxxx> > Sent: Thursday, October 3, 2024 4:14 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: intel-xe@xxxxxxxxxxxxxxxxxxxxx; Kandpal, Suraj > <suraj.kandpal@xxxxxxxxx>; jani.nikula@xxxxxxxxxxxxxxx > Subject: [PATCH 1/7] drm/i915/dp: Use HAS_DSC macro in > intel_dp_dsc_max_src_input_bpc > > Use HAS_DSC macro to take into account platforms for which DSC is fused. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@xxxxxxxxx> LGTM Reviewed-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index c4fdae5097ec..c47748905506 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1766,6 +1766,9 @@ intel_dp_compute_link_config_wide(struct > intel_dp *intel_dp, static > u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915) { > + if (!HAS_DSC(i915)) > + return 0; > + > /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ > if (DISPLAY_VER(i915) >= 12) > return 12; > -- > 2.45.2