On Mon, Nov 04, 2013 at 08:13:45AM +0100, Daniel Vetter wrote: > Apparently they need the same treatment as primary planes. This fixes > modesetting failures because of stuck cursors (!) on Thomas' i830M > machine. What treatment? Primary planes don't need any extra posting reads AFAIK. > > I've figured while at it I'll also roll it out for the ivb 3 pipe > version of this function. I didn't do this for i845/i865 since Bspec > says the update mechanism works differently, and there's some > additional rules about what can be updated in which order. > > Tested-by: Thomas Richter <thor@xxxxxxxxxxxxxxxxx> I didn't see an explicit note from Thomas saying that he tested it. > Cc: stable@xxxxxxxxxxxxxxx > Cc: Thomas Richter <thor@xxxxxxxxxxxxxxxxx> > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index f34252d134b6..04d2699f51b4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -7123,7 +7123,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base) > intel_crtc->cursor_visible = visible; > } > /* and commit changes on next vblank */ > + POSTING_READ(CURCNTR(pipe)); > I915_WRITE(CURBASE(pipe), base); > + POSTING_READ(CURBASE(pipe)); > } > > static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) > @@ -7152,7 +7154,9 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base) > intel_crtc->cursor_visible = visible; > } > /* and commit changes on next vblank */ > + POSTING_READ(CURCNTR_IVB(pipe)); > I915_WRITE(CURBASE_IVB(pipe), base); > + POSTING_READ(CURBASE_IVB(pipe)); > } > > /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */ > -- > 1.8.4.rc3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx