On Sun, Nov 03, 2013 at 09:44:56AM -0800, Ben Widawsky wrote: > On Sun, Nov 03, 2013 at 01:07:58PM +0200, Ville Syrjälä wrote: > > On Sat, Nov 02, 2013 at 09:07:40PM -0700, Ben Widawsky wrote: > > > GEN8 also needs this workaround. > > > > Not according to the w/a database. > > > > But the register description is the same for both HSW and BDW. Also for > > HSW, the w/a doesn't actually say whether we should set or clear the bit. > > the default is listed to be 0, so I guess we should set it, but then > > it's unclear why BDW wouldn't need the w/a. Once again a very poorly > > docuemnted w/a :( > > Just an FYI: all workarounds for Broadwell came from the bspec, as the > workaround database did not exist for Broadwell at that time. > > Also, I was informally told not to trust the workaround database yet. I can't find this w/a in bspec either, not even for HSW. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
