On Sun, 03 Nov 2013, Ben Widawsky <benjamin.widawsky@xxxxxxxxx> wrote: > From: Damien Lespiau <damien.lespiau@xxxxxxxxx> > > Just like HSW. > > This means we can scan out a mode with a 300Mhz pixel clock with a depth > of 24 bits, but only a 200Mhz one with a 36bits depth. > > Signed-off-by: Damien Lespiau <damien.lespiau@xxxxxxxxx> > Reviewed-by: Ben Widawsky <ben@xxxxxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_hdmi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > index 51a8336..03f9ca7 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -847,7 +847,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi) > > if (IS_G4X(dev)) > return 165000; > - else if (IS_HASWELL(dev)) > + else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) > return 300000; > else > return 225000; > -- > 1.8.4.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
