Implements WaVSRefCountFullforceMissDisable Implements WaDSRefCountFullforceMissDisable v2: Rebased on the HSW patch (which fixed the bug from v1) commit 41c0b3a88c7bae96d8e2ee60c7ed91f57fd152d7 Author: Ben Widawsky <ben@xxxxxxxxxxxx> Date: Sat Jan 26 11:52:00 2013 -0800 drm/i915: Implement WaVSRefCountFullforceMissDisable Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9929750..68b877d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -990,6 +990,7 @@ #define GEN7_FF_THREAD_MODE 0x20a0 #define GEN7_FF_SCHED_MASK 0x0077070 +#define GEN7_FF_DS_REF_CNT_FFME (1 << 19) #define GEN7_FF_TS_SCHED_HS1 (0x5<<16) #define GEN7_FF_TS_SCHED_HS0 (0x3<<16) #define GEN7_FF_TS_SCHED_LOAD_BALANCE (0x1<<16) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index abc51ea..81ec2c3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5147,6 +5147,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) if (IS_HASWELL(dev_priv->dev)) reg &= ~GEN7_FF_VS_REF_CNT_FFME; + /* WaVSRefCountFullforceMissDisable|WaDSRefCountFullforceMissDisable */ + if (IS_GEN8(dev_priv->dev)) + reg &= ~(GEN7_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME); + I915_WRITE(GEN7_FF_THREAD_MODE, reg); } -- 1.8.4.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx