From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Now that we are actually setting the device to the D3 state, we should issue the notification. Jani originally wrote a similar patch for PC8, but then we discovered that we were not really changing the PCI D states when enabling/disabling PC8, so we had to postpone his patch. Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Credits-to: Jani Nikula <jani.nikula@xxxxxxxxx> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 08fc7ea..a999a3f 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -896,6 +896,7 @@ static int i915_runtime_suspend(struct device *device) dev_priv->pm.suspended = true; + intel_opregion_notify_adapter(dev, PCI_D3cold); pci_save_state(pdev); pci_set_power_state(pdev, PCI_D3cold); @@ -914,6 +915,7 @@ static int i915_runtime_resume(struct device *device) pci_set_power_state(pdev, PCI_D0); pci_restore_state(pdev); + intel_opregion_notify_adapter(dev, PCI_D0); dev_priv->pm.suspended = false; -- 1.8.3.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
