On Wed, Oct 16, 2013 at 05:25:53PM +0300, Imre Deak wrote:
> Currently we make sure that all power domains are enabled during driver
> init and turn off unneded ones only after the first modeset. Similarly
> during suspend we enable all power domains, which will remain on through
> the following resume until the first modeset.
>
> This logic is supported by intel_set_power_well() in the power domain
> framework. It would be nice to simplify the API, so that we only have
> get/put functions and make it more explicit on the higher level how this
> "power well on during init" logic works. This will make it also easier
> if in the future we want to shorten the time the power wells are on.
>
> For this add a new device private flag tracking whether we have the
> power wells on because of init/suspend and use only
> intel_display_power_get()/put(). As nothing else uses
> intel_set_power_well() we can remove it.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
[snip]
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index e4354dd..0557c6b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -100,6 +100,7 @@ enum intel_display_power_domain {
> POWER_DOMAIN_TRANSCODER_C,
> POWER_DOMAIN_TRANSCODER_EDP,
> POWER_DOMAIN_VGA,
> + POWER_DOMAIN_INIT,
>
> POWER_DOMAIN_NUM,
> };
> @@ -913,7 +914,6 @@ struct i915_power_well {
> struct mutex lock;
> /* power well enable/disable usage count */
> int count;
> - int i915_request;
> };
>
> struct i915_dri1_state {
> @@ -1369,6 +1369,11 @@ typedef struct drm_i915_private {
> * mchdev_lock in intel_pm.c */
> struct intel_ilk_power_mgmt ips;
>
> + /*
> + * Power wells needed for initialization at driver init and suspend
> + * time are on. They are kept on until after the first modeset.
> + */
> + bool init_power_on;
Please move this into the nice power_well structure we have to avoid
overtly polluting our i915_driver_private thing ... All patches up to this
one merged, thanks.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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