On Mon, Oct 21, 2013 at 01:22:40PM +0300, Ville Syrjälä wrote:
> On Fri, Oct 18, 2013 at 04:37:05PM +0200, Daniel Vetter wrote:
> > Really simple, and we don't even have working frame numbers.
> >
> > v2: Actually enable it ...
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 20 ++++++++++++++++++--
> > 1 file changed, 18 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> > index e3f0980..3f4fd7c 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -1947,6 +1947,20 @@ static int display_crc_ctl_open(struct inode *inode, struct file *file)
> > return single_open(file, display_crc_ctl_show, dev);
> > }
> >
> > +static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source source,
> > + uint32_t *val)
> > +{
> > + switch (source) {
> > + case INTEL_PIPE_CRC_SOURCE_PIPE:
> > + *val = PIPE_CRC_ENABLE;
>
> On gen3+ the border is always included in the crc. Maybe we should
> always include it on gen2 as well?
I've considered but decided to go meh. But you're right, for consistency
we should enable the border on gen2, too. I'll resend.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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