On Fri, Oct 18, 2013 at 08:36:36AM +0200, Daniel Vetter wrote: > In > > Author: Daniel Vetter <daniel.vetter@xxxxxxxx> > Date: Wed Jun 5 13:34:23 2013 +0200 > > drm/i915: consolidate pch pll enable sequence > > I've removed all the code from this if block, but somehow forgotten to > kill the block itself. > > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 04c3e1b..38892db 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6072,11 +6072,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, > else > intel_crtc->lowfreq_avail = false; > > - if (intel_crtc->config.has_pch_encoder) { > - pll = intel_crtc_to_shared_dpll(intel_crtc); > - > - } > - > intel_set_pipe_timings(intel_crtc); > > if (intel_crtc->config.has_pch_encoder) { > -- > 1.8.4.rc3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx