On Mon, Oct 14, 2013 at 11:01:11AM +0100, Chris Wilson wrote: > On Fri, Oct 11, 2013 at 09:52:42PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > Continuing a bit with improving the vblank timestamp stuff, I decided that > > it's also time to fix gen2 properly. > > > > All this time we've been pretending it has the same pixel+frame counter that > > gen3 and gen4 have, when in fact it doesn't. Luckily the same offset has > > nothing else on gen2, so it has just read out as 0 and everything more or > > less worked. > > > > Sadly there doesn't seem to be any frame counter register on gen2. For the > > scanout position, DSL + additional tricks works equally well for gen2 as > > it does for ctg+. > > Confirmed the absence of said registers, so > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Both merged, thanks for patches&review. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
