On Thu, Oct 10, 2013 at 07:42:22PM -0300, Paulo Zanoni wrote: > 2013/10/9 <ville.syrjala@xxxxxxxxxxxxxxx>: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > On HSW the LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4. We make the > > conversion from LPn to to the level at one point current. Later we're > > going to do it in a few places, so move it to a separate function. > > I guess this function will work on ILK/SNB/IVB even though they don't > follow this rule, right? If yes: Reviewed-by: Paulo Zanoni > <paulo.r.zanoni@xxxxxxxxx> Yes, level 4 is never enabled on those, so we never do the +1. > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_pm.c | 8 +++++++- > > 1 file changed, 7 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > index c17518d..d307039 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -2705,6 +2705,12 @@ static void ilk_wm_merge(struct drm_device *dev, > > } > > } > > > > +static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *pipe_wm) > > +{ > > + /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ > > + return wm_lp + (wm_lp >= 2 && pipe_wm->wm[4].enable); > > +} > > + > > static void hsw_compute_wm_results(struct drm_device *dev, > > const struct intel_pipe_wm *merged, > > struct hsw_wm_values *results) > > @@ -2718,7 +2724,7 @@ static void hsw_compute_wm_results(struct drm_device *dev, > > for (wm_lp = 1; wm_lp <= 3; wm_lp++) { > > const struct intel_wm_level *r; > > > > - level = wm_lp + (wm_lp >= 2 && merged->wm[4].enable); > > + level = ilk_wm_lp_to_level(wm_lp, merged); > > > > r = &merged->wm[level]; > > if (!r->enable) > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Paulo Zanoni -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx