2013/10/9 <ville.syrjala@xxxxxxxxxxxxxxx>: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > When there are zero active pipes, all the watermarks should be zero > also. No point in wasting time w/ computing the 5/6 split watermark > config. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 0fe6c36..c17518d 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2900,7 +2900,7 @@ static void haswell_update_wm(struct drm_crtc *crtc) > ilk_wm_merge(dev, &max, &lp_wm_1_2); > > /* 5/6 split only in single pipe config on IVB+ */ > - if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1) { > + if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) { I was going to say "but you've just introduced this in the last patch", then I re-check and saw that it was already there even before the previous patch, you've just moved the code around on the last patch. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, &max); > ilk_wm_merge(dev, &max, &lp_wm_5_6); > > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx