On Tue, 1 Oct 2013 15:32:38 -0700 Ben Widawsky <benjamin.widawsky@xxxxxxxxx> wrote: > This patch attempts to clean up the ring/IA scaling programming in the > following ways. > 1. Fix the comment about the DDR frequency. The math is 266MHz, not > 133MHz. Formula was right, docs are wrong. > > 2. Mask the DCLK register since I don't know how it is defined on future > platforms. > > 3. use mult_frac instead of magic math. > > This helps for future platform enabling. > > v2: Actually use the right patch. The v1 was a mix of things, none of > which was right. Note that due to rounding, we actually get different > values (slightly higher) for the effective ring frequency. > > CC: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > CC: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 698257c..cb0876b 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3663,9 +3663,9 @@ void gen6_update_ring_freq(struct drm_device *dev) > /* Convert from kHz to MHz */ > max_ia_freq /= 1000; > > - min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK); > - /* convert DDR frequency from units of 133.3MHz to bandwidth */ > - min_ring_freq = (2 * 4 * min_ring_freq + 2) / 3; > + min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK) & 0xf; > + /* convert DDR frequency from units of 266.6MHz to bandwidth */ > + min_ring_freq = mult_frac(min_ring_freq, 8, 3); > > /* > * For each potential GPU frequency, load a ring frequency we'd like > @@ -3678,7 +3678,7 @@ void gen6_update_ring_freq(struct drm_device *dev) > unsigned int ia_freq = 0, ring_freq = 0; > > if (IS_HASWELL(dev)) { > - ring_freq = (gpu_freq * 5 + 3) / 4; > + ring_freq = mult_frac(gpu_freq, 4, 3); > ring_freq = max(min_ring_freq, ring_freq); > /* leave ia_freq as the default, chosen by cpufreq */ > } else { Seems like the second mult_frac should be 5,4 rather than 4,3, to match the original calculation? _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx