On Mon, Sep 30, 2013 at 01:48:13AM +0200, Andi Kleen wrote: > > Jesse, > > I was playing with a static analyzer and it flagged the following > code of yours. > > Is the val = 0 directly after the register read correct and intended? Also the same pattern is in other places, like vlv_pre_enable_dp. -Andi > > commit 89b667f86a62a99a7b484a7e1b3f8f7a108a7dee > Author: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> > Date: Thu Apr 18 14:51:36 2013 -0700 > > drm/i915: update VLV PLL and DPIO code v11 > ... > > static void intel_pre_enable_dp(struct intel_encoder *encoder) > { > struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); > struct drm_device *dev = encoder->base.dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > > if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) > ironlake_edp_pll_on(intel_dp); > + > + if (IS_VALLEYVIEW(dev)) { > + struct intel_digital_port *dport = enc_to_dig_port(&encoder->base); > + struct intel_crtc *intel_crtc = > + to_intel_crtc(encoder->base.crtc); > + int port = vlv_dport_to_channel(dport); > + int pipe = intel_crtc->pipe; > + u32 val; > + > + WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock)); > + > + val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port)); > + val = 0; <------------- val is directly overriden, previous value is ignored > + if (pipe) > + val |= (1<<21); > + else > + val &= ~(1<<21); > > > > > > -- > ak@xxxxxxxxxxxxxxx -- Speaking for myself only. -- ak@xxxxxxxxxxxxxxx -- Speaking for myself only. _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx