Re: [PATCH v2 05/14] drm/i915: Rewrite vlv_find_best_dpll()

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On Thu, Sep 26, 2013 at 06:30:55PM +0300, Mika Kuoppala wrote:
> ville.syrjala@xxxxxxxxxxxxxxx writes:
> 
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Rewrite vlv_find_best_dpll() to use intel_clock_t rather than
> > an army of local variables.
> >
> > Also extract the code to calculate the derived values into
> > vlv_clock().
> >
> > v2: Split up the earlier fixes, extract vlv_clock()
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 72 ++++++++++++++++--------------------
> >  1 file changed, 31 insertions(+), 41 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index f646fea..c5f0794 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -438,6 +438,14 @@ static void i9xx_clock(int refclk, intel_clock_t *clock)
> >  	clock->dot = clock->vco / clock->p;
> >  }
> >  
> > +static void vlv_clock(int refclk, intel_clock_t *clock)
> > +{
> > +	clock->m = clock->m1 * clock->m2;
> > +	clock->p = clock->p1 * clock->p2;
> > +	clock->vco = refclk * clock->m / clock->n;
> > +	clock->dot = clock->vco / clock->p;
> > +}
> > +
> >  /**
> >   * Returns whether any output on the specified pipe is of the specified type
> >   */
> > @@ -670,66 +678,48 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
> >  		   int target, int refclk, intel_clock_t *match_clock,
> >  		   intel_clock_t *best_clock)
> >  {
> > -	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
> > -	u32 m, n, fastclk;
> > -	u32 updrate, minupdate, p;
> > +	intel_clock_t clock;
> > +	u32 minupdate = 19200;
> >  	unsigned int bestppm = 1000000;
> > -	int dotclk, flag;
> >  
> > -	flag = 0;
> > -	dotclk = target * 1000;
> > -	fastclk = dotclk / (2*100);
> > -	updrate = 0;
> > -	minupdate = 19200;
> > -	n = p = p1 = p2 = m = m1 = m2 = vco = bestn = 0;
> > -	bestm1 = bestm2 = bestp1 = bestp2 = 0;
> > +	target *= 5; /* fast clock */
> >  
> >  	/* based on hardware requirement, prefer smaller n to precision */
> > -	for (n = limit->n.min; n <= ((refclk) / minupdate); n++) {
> > -		updrate = refclk / n;
> > -		for (p1 = limit->p1.max; p1 > limit->p1.min; p1--) {
> > -			for (p2 = limit->p2.p2_fast+1; p2 > 0; p2--) {
> > -				if (p2 > 10)
> > -					p2 = p2 - 1;
> > -				p = p1 * p2;
> > +	for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) {
> > +		for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) {
> > +			for (clock.p2 = limit->p2.p2_fast+1; clock.p2 > 0; clock.p2--) {
> > +				if (clock.p2 > 10)
> > +					clock.p2--;
> > +				clock.p = clock.p1 * clock.p2;
> >  				/* based on hardware requirement, prefer bigger m1,m2 values */
> 
> Is this comment valid as we seem to start from m1.min?

We anyway try to find the closest m2 based on m1,n,p1 and p2, and since
we start w/ large p dividers, m1*m2 will come out as something big to
compensate. Though starting with small n does mean m2 doesn't come out
as large as it could be, but I guess having a small n is considered
more important than having a large m.

The bestppm comparison we do guarantees that we prefer an earlier result
unless the new ppm is at least 10 better, and since we start with small
n and large p, it should do what we want.

Then there's ppm<100 comparison which is a bit different. It means we
favor anything that is considered good enough (ppm < 100) as long as
the p divider increases, and hence the VCO frequency increases. That
would seem to be in line with the other stated goals of big m and small n.

> 
> > -				for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) {
> > +				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
> >  					unsigned int ppm, diff;
> >  
> > -					m2 = DIV_ROUND_CLOSEST(fastclk * p * n, refclk * m1);
> > -					m = m1 * m2;
> > -					vco = updrate * m;
> > +					clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n,
> > +								     refclk * clock.m1);
> >  
> > -					if (vco < limit->vco.min || vco >= limit->vco.max)
> > +					vlv_clock(refclk, &clock);
> > +
> 
> > +					if (clock.vco < limit->vco.min ||
> > +					    clock.vco >= limit->vco.max)
> >  						continue;
> 
> Can intel_PLL_is_valid() used here instead of just checking the vco?

We'd need to modify intel_PLL_is_valid() a bit to skip the m1<=m2 check,
and we'd also need to skip the 'm' and 'p' divider check, or populate
the m and p min/max with something that makes sense.

It would do the clock.dot min/max check that we're currently missing
from this function, and I guess it would allow easier debugging since it
has the INTELPllInvalid() macro for that purpose. So it would seem to be
a good idea to use it.

> 
> >  
> > -					diff = abs(vco / p - fastclk);
> > -					ppm = div_u64(1000000ULL * diff, fastclk);
> > -					if (ppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
> > +					diff = abs(clock.dot - target);
> > +					ppm = div_u64(1000000ULL * diff, target);
> > +
> > +					if (ppm < 100 && clock.p > best_clock->p) {
> >  						bestppm = 0;
> > -						flag = 1;
> > +						*best_clock = clock;
> >  					}
> > +
> >  					if (bestppm >= 10 && ppm < bestppm - 10) {
> >  						bestppm = ppm;
> > -						flag = 1;
> > -					}
> > -					if (flag) {
> > -						bestn = n;
> > -						bestm1 = m1;
> > -						bestm2 = m2;
> > -						bestp1 = p1;
> > -						bestp2 = p2;
> > -						flag = 0;
> > +						*best_clock = clock;
> >  					}
> >  				}
> >  			}
> >  		}
> >  	}
> > -	best_clock->n = bestn;
> > -	best_clock->m1 = bestm1;
> > -	best_clock->m2 = bestm2;
> > -	best_clock->p1 = bestp1;
> > -	best_clock->p2 = bestp2;
> >  
> >  	return true;
> >  }
> > -- 
> > 1.8.1.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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