Hi Dave, Daniel,
Here is the final pull request for 6.7.
As indicated that it may happen in the last pull, the remaining
missing functionality for Meteorlake, enabling the GuC based TLB
invalidation, has since been merged and platform thought to be ready for
lifting out of force probe status.
Also for Meteorlake a correction on how L3 flushing is done landed.
Otherwise one fix for perf/OA and one for mmap gtt handling and some code
base cleanups.
Regards,
Tvrtko
drm-intel-gt-next-2023-10-19:
Driver Changes:
Fixes/improvements/new stuff:
- Retry gtt fault when out of fence registers (Ville Syrjälä)
- Determine context valid in OA reports [perf] (Umesh Nerlige Ramappa)
Future platform enablement:
- GuC based TLB invalidation for Meteorlake (Jonathan Cavitt, Prathap Kumar Valsan)
- Don't set PIPE_CONTROL_FLUSH_L3 [mtl] (Vinay Belgaumkar)
Miscellaneous:
- Clean up zero initializers [guc,pxp] (Ville Syrjälä)
- Prevent potential null-ptr-deref in engine_init_common (Nirmoy Das)
The following changes since commit 039adf3947252693f7c882607dac2dc67e7f7ab2:
drm/i915: More use of GT specific print helpers (2023-10-10 15:40:26 -0700)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-gt-next-2023-10-19
for you to fetch changes up to 7eeaedf79989a8f131939782832e21e9218ed2a0:
drm/i915/perf: Determine context valid in OA reports (2023-10-18 16:19:56 -0700)
----------------------------------------------------------------
Driver Changes:
Fixes/improvements/new stuff:
- Retry gtt fault when out of fence registers (Ville Syrjälä)
- Determine context valid in OA reports [perf] (Umesh Nerlige Ramappa)
Future platform enablement:
- GuC based TLB invalidation for Meteorlake (Jonathan Cavitt, Prathap Kumar Valsan)
- Don't set PIPE_CONTROL_FLUSH_L3 [mtl] (Vinay Belgaumkar)
Miscellaneous:
- Clean up zero initializers [guc,pxp] (Ville Syrjälä)
- Prevent potential null-ptr-deref in engine_init_common (Nirmoy Das)
----------------------------------------------------------------
Jonathan Cavitt (6):
drm/i915: Add GuC TLB Invalidation device info flags
drm/i915/guc: Add CT size delay helper
drm/i915: No TLB invalidation on suspended GT
drm/i915: No TLB invalidation on wedged GT
drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck
drm/i915: Enable GuC TLB invalidations for MTL
Nirmoy Das (1):
drm/i915: Prevent potential null-ptr-deref in engine_init_common
Prathap Kumar Valsan (1):
drm/i915: Define and use GuC and CTB TLB invalidation routines
Umesh Nerlige Ramappa (1):
drm/i915/perf: Determine context valid in OA reports
Ville Syrjälä (3):
drm/i915: Retry gtt fault when out of fence registers
drm/i915/guc: Clean up zero initializers
drm/i915/pxp: Clean up zero initializers
Vinay Belgaumkar (1):
drm/i915/mtl: Don't set PIPE_CONTROL_FLUSH_L3
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 7 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 30 ++-
drivers/gpu/drm/i915/gt/intel_tlb.c | 16 +-
drivers/gpu/drm/i915/gt/selftest_tlb.c | 11 +-
drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 33 +++
drivers/gpu/drm/i915/gt/uc/intel_guc.h | 23 +++
drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 38 ++++
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 2 +
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 233 +++++++++++++++++++++-
drivers/gpu/drm/i915/gt/uc/intel_uc.c | 7 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_perf.c | 4 +-
drivers/gpu/drm/i915/intel_device_info.h | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 8 +-
drivers/gpu/drm/i915/pxp/intel_pxp_huc.c | 4 +-
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 8 +-
21 files changed, 407 insertions(+), 30 deletions(-)
