On Thu, Sep 19, 2013 at 05:00:38PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
>
> This workaround is described in the mode set sequence documentation.
> When enabling planes for the second pipe, we need to wait for 2
> vblanks on the first pipe. This should solve "a flash of screen
> corruption if planes are enabled on second/third pipe during the time
> that big FIFO mode is exiting". Watermarks are fun :)
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 8c3000d..fc55570 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3432,6 +3432,34 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
> intel_disable_plane(dev_priv, plane, pipe);
> }
>
> +/*
> + * This implements the workaround described in the "notes" section of the mode
> + * set sequence documentation. When going from no pipes or single pipe to
> + * multiple pipes, and planes are enabled after the pipe, we need to wait at
> + * least 2 vblanks on the first pipe before enabling planes on the second pipe.
> + */
> +static void haswell_mode_set_planes_workaround(struct intel_crtc *crtc)
> +{
> + struct drm_device *dev = crtc->base.dev;
> + struct intel_crtc *crtc_it, *other_active_crtc = NULL;
> +
> + /* We want to get the other_active_crtc only if there's only 1 other
> + * active crtc. */
> + list_for_each_entry(crtc_it, &dev->mode_config.crtc_list, base.head) {
> + if (crtc_it->active && crtc_it != crtc) {
> + if (other_active_crtc)
> + return;
> + else
> + other_active_crtc = crtc_it;
> + }
Just a small bikeshed to avoid a few level is indentation here.
Eg.
if (!crtc_it->active || crtc_it == crtc)
continue;
if (other_active_crtc)
return;
other_active_crtc = crtc_it;
But I won't insist on it, so even w/o the change:
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> + }
> + if (!other_active_crtc)
> + return;
> +
> + intel_wait_for_vblank(dev, other_active_crtc->pipe);
> + intel_wait_for_vblank(dev, other_active_crtc->pipe);
> +}
> +
> static void haswell_crtc_enable(struct drm_crtc *crtc)
> {
> struct drm_device *dev = crtc->dev;
> @@ -3483,6 +3511,9 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
> intel_opregion_notify_encoder(encoder, true);
> }
>
> + /* If we change the relative order between pipe/planes enabling, we need
> + * to change the workaround. */
> + haswell_mode_set_planes_workaround(intel_crtc);
> haswell_crtc_enable_planes(crtc);
>
> /*
> --
> 1.8.3.1
>
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--
Ville Syrjälä
Intel OTC
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