From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> This function is called in a point where the pipe is not really running (the fact that PIPECONF is enabled doesn't mean that the pipe is actually running), so we pay the full 50ms timeout. Also, I couldn't find a reason why this is needed, so just skip it. I do have to notice we still have other vblank waits at later points of the mode set sequence, and at least some of them make sense. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_display.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2f546f7..69e8bb6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3509,7 +3509,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_update_watermarks(crtc); intel_enable_pipe(dev_priv, pipe, intel_crtc->config.has_pch_encoder, false); - intel_wait_for_vblank(dev, pipe); if (intel_crtc->config.has_pch_encoder) lpt_pch_enable(crtc); -- 1.8.3.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx