On Fri, Sep 06, 2013 at 07:40:05AM +0300, Jani Nikula wrote:
> VLV has per-pipe PP registers. Set up power sequencing on mode set. The
> connector init time setup is problematic, since we don't have a pipe at
> that time. Cook up something.
>
> v2:
> - use vlv_power_sequencer_pipe() also in _pp_{ctrl,stat}_reg()
> - use PANEL_PORT_SELECT_DPC_VLV (Ville)
>
> v3: make checkpatch happier
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Series merged, thanks for patches&review. Although I couldn't resist to
make this one here completely checkpatch clean, after all you've bothered
to resend it ;-)
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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