On Wed, Sep 04, 2013 at 10:54:30AM +0100, Chris Wilson wrote: > Once again we find that Valleyview is ever so subtlety different from > the rest of its gen7 brethen. In this case, Valleyview has no support > for pageflipping from the RCS ring. > > Fixes a regression from > commit b0135d2b287424cceeebe79ef81fd1e6425509a3 > Author: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Date: Mon Aug 26 20:58:12 2013 +0100 > > drm/i915: Use RCS flips on Ivybridge+ > > Reported-by: "Lee, Chon Ming" <chon.ming.lee@xxxxxxxxx> > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68968 Picked up for -fixes, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 30e5946..c4e4468 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -7863,7 +7863,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev, > int len, ret; > > ring = obj->ring; > - if (ring == NULL || ring->id != RCS) > + if (IS_VALLEYVIEW(dev) || ring == NULL || ring->id != RCS) > ring = &dev_priv->ring[BCS]; > > ret = intel_pin_and_fence_fb_obj(dev, obj, ring); > -- > 1.8.4.rc3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
