On Thu, 05 Sep 2013, Chon Ming Lee <chon.ming.lee@xxxxxxxxx> wrote: > The additional pipe parameter will use to select which phy to target > for. > > Signed-off-by: Chon Ming Lee <chon.ming.lee@xxxxxxxxx> > --- [snip] > diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c > index 0a41670..12bbc28 100644 > --- a/drivers/gpu/drm/i915/intel_sideband.c > +++ b/drivers/gpu/drm/i915/intel_sideband.c > @@ -157,19 +157,29 @@ void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) > PUNIT_OPCODE_REG_WRITE, reg, &val); > } > > -u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg) > +u32 vlv_get_phy_port(enum pipe pipe) > +{ > + u32 port = IOSF_PORT_DPIO; > + > + if (!((pipe == PIPE_A) || (pipe == PIPE_B))) { > + DRM_ERROR("Invalid pipe detected\n"); > + } > + > + return port; > +} So this patch doesn't actually have any functional changes. It would be good to say that in the commit message. It would also be interesting to see the intended follow-up patch using the pipe parameter for something, in order to assess the usefulness of this change. BR, Jani. > + > +u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg) > { > u32 val = 0; > > - vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO, > + vlv_sideband_rw(dev_priv, DPIO_DEVFN, vlv_get_phy_port(pipe), > DPIO_OPCODE_REG_READ, reg, &val); > - > return val; > } > > -void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val) > +void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val) > { > - vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO, > + vlv_sideband_rw(dev_priv, DPIO_DEVFN, vlv_get_phy_port(pipe), > DPIO_OPCODE_REG_WRITE, reg, &val); > } > > -- > 1.7.7.6 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx