On Mon, Sep 02, 2013 at 08:39:45PM +0200, Daniel Vetter wrote: > On Mon, Sep 02, 2013 at 09:13:30PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > The pixel clock should come from adjusted_mode not requested_mode. > > In this case the two should be the same as we don't currently > > overwrite the clock in the case of HDMI. But let's make the code > > safe against such things happening in the future. > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Atm only the encoder overrides the adjusted_mode at all, so I think I > prefer the current code flow as clearer ... And I'd atually prefer to kill requested_mode. It's confusing. Only hdisplay/vdisplay are always valid. Well even that's not true as can be seen from my double wide series. The clock and timings can be trusted only at the very beginning of the compute config step. And at that point adjusted_mode contains the exact same information. Also apart from the clock, we never use the other timings from requested_mode, so keeping the whole thing around seems more or less pointless. > -Daniel > > > --- > > drivers/gpu/drm/i915/intel_hdmi.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c > > index 4148cc8..48e3b32 100644 > > --- a/drivers/gpu/drm/i915/intel_hdmi.c > > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > > @@ -862,7 +862,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, > > struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); > > struct drm_device *dev = encoder->base.dev; > > struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; > > - int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2; > > + int clock_12bpc = pipe_config->adjusted_mode.clock * 3 / 2; > > int portclock_limit = hdmi_portclock_limit(intel_hdmi); > > int desired_bpp; > > > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
