On Fri, Aug 23, 2013 at 10:18:39PM +0000, Azad, Vinit wrote: > Thanks Mika. It looks good to me. > > Reviewed-by: Vinit Azad <vinit.azad@xxxxxxxxx> > -----Original Message----- > From: Mika Kuoppala [mailto:mika.kuoppala@xxxxxxxxxxxxxxx] > Sent: Thursday, August 22, 2013 11:09 > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Mika Kuoppala; Azad, Vinit > Subject: [PATCH] drm/i915: Don't mask EI UP interrupt on IVB|SNB > > Submitting a batchbuffer which simulates a gpu hang by doing MI_BATCH_BUFFER_START into itself, to test hangcheck, started to hard hang the whole box (IVB). Bisecting lead to this commit: > > commit 664b422c2966cd39b8f67e8d53a566ea8c877cd6 > Author: Vinit Azad <vinit.azad@xxxxxxxxx> > Date: Wed Aug 14 13:34:33 2013 -0700 > > drm/i915: Only unmask required PM interrupts > > Experimenting with the mask register showed that unmasking EI UP will prevent the hard hang in IVB and SNB. > HSW doesn't hang with EI UP masked. > > Considering we are just disabling interrupts that aren't even delivered to driver, this change is more likely to paper over some weirdness in gpu's internal state machine. But until better explanation can be found, let's trade little bit of power for stability on these architectures. > > v2: - Unmask EI_EXPIRED directly in I915_WRITE (Vinit) > v3: - Only unmask on SNB and IVB > > Cc: Vinit Azad <vinit.azad@xxxxxxxxx> > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
