2013/8/22 Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>: > On Wed, 21 Aug 2013 15:29:17 +0000 > "Lin, Mengdong" <mengdong.lin@xxxxxxxxx> wrote: > >> Hi Ben, >> >> How will Gfx driver support runtime PM on Haswell? Will the Gfx driver trigger "Adapter Power State" notification to BIOS when GPU switch state between D0 and D3? >> >> We need to support RTD3 for HD-A legacy audio on Haswell Ultrabook. And this depends on Gfx driver to implement two BIOS notifications. >> >> Here is the background of this dependency: >> The target of HD-Audio RTD3 is that BIOS can power off the on-board 3rd party audio codec to save power in S0. This would help to save ~60mW. >> Please note that audio driver cannot power off the codec, because the codec power is controlled by some GPIO which is board specific. >> >> The BIOS will power off the audio codec when three requirements are met: >> >> (1) System is running on battery >> >> (2) HD-Audio controller is in D3. Means no active audio application is using the audio devices. >> >> (3) All displays are off. This means system is in "User-Absent Mode", and a long latency for devices to resume back to D0 is allowed, such as ~300ms to power on the audio codec. >> >> For the 3rd requirement, BIOS needs Gfx driver to tell whether the system is in user-absent mode. It needs Gfx driver to triger two SCI SW notifications: Display Power State Notification and Adapter Power State Notification. >> 'Display Power State Notification' was implemented by Jani. But we were told that 'Adapter Power State' notification needs Gfx driver to support runtime PM at first. >> >> So would you please share some information about runtime PM support in Gfx driver? > > Paulo was going to test this on top of his PC8+ patchset. AFAFIK the > only thing we need to do is put the device into D3 when we enter the > PC8+ mode, and the BIOS will do the right thing (when we use the > OpRegion stuff Jani did anyway). > > Paulo, are you still out celebrating the PC8 bits or have you had a > chance to try this yet? >From Mengdong's email, it seems Jani's patch series implements exactly what was requested, except for the fact that our patch says "D1" instead of "D3" to the BIOS. Is there something else we need besides this? > > -- > Jesse Barnes, Intel Open Source Technology Center -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
