2013/8/21 Daniel Vetter <daniel.vetter@xxxxxxxx>: > If we don't use the return value of a mmio read our coding style is to > use the POSTING_READ macro. This avoids cluttering the mmio traces. > > Similarly for busy loops to wait for a bit to flip we use the _NOTRACE > variant to avoid filling up the tracebuffers with gunk. Spotted while > reading some follow-up patches from Paulo. > > While at it add the missing posting read in the lcpll enable function > that Paulo spotted. > > Cc: Paulo Zanoni <przanoni@xxxxxxxxx> > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> I'm pretty sure I added many other wait_for calls without the _NOTRACE in the past... > --- > drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 7a40427..39b53e5 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5999,7 +5999,7 @@ void hsw_disable_lcpll(struct drm_i915_private *dev_priv, > I915_WRITE(LCPLL_CTL, val); > POSTING_READ(LCPLL_CTL); > > - if (wait_for((I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK) == 0, 1)) > + if (wait_for((I915_READ_NOTRACE(LCPLL_CTL) & LCPLL_PLL_LOCK) == 0, 1)) > DRM_ERROR("LCPLL still locked\n"); > > val = I915_READ(D_COMP); > @@ -6008,7 +6008,7 @@ void hsw_disable_lcpll(struct drm_i915_private *dev_priv, > POSTING_READ(D_COMP); > ndelay(100); > > - if (wait_for((I915_READ(D_COMP) & D_COMP_RCOMP_IN_PROGRESS) == 0, 1)) > + if (wait_for((I915_READ_NOTRACE(D_COMP) & D_COMP_RCOMP_IN_PROGRESS) == 0, 1)) > DRM_ERROR("D_COMP RCOMP still in progress\n"); > > if (allow_power_down) { > @@ -6036,19 +6036,20 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv) > if (val & LCPLL_POWER_DOWN_ALLOW) { > val &= ~LCPLL_POWER_DOWN_ALLOW; > I915_WRITE(LCPLL_CTL, val); > + POSTING_READ(LCPLL_CTL); > } > > val = I915_READ(D_COMP); > val |= D_COMP_COMP_FORCE; > val &= ~D_COMP_COMP_DISABLE; > I915_WRITE(D_COMP, val); > - I915_READ(D_COMP); > + POSTING_READ(D_COMP); > > val = I915_READ(LCPLL_CTL); > val &= ~LCPLL_PLL_DISABLE; > I915_WRITE(LCPLL_CTL, val); > > - if (wait_for(I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK, 5)) > + if (wait_for(I915_READ_NOTRACE(LCPLL_CTL) & LCPLL_PLL_LOCK, 5)) > DRM_ERROR("LCPLL not locked yet\n"); > > if (val & LCPLL_CD_SOURCE_FCLK) { > @@ -6056,7 +6057,7 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv) > val &= ~LCPLL_CD_SOURCE_FCLK; > I915_WRITE(LCPLL_CTL, val); > > - if (wait_for_atomic_us((I915_READ(LCPLL_CTL) & > + if (wait_for_atomic_us((I915_READ_NOTRACE(LCPLL_CTL) & > LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1)) > DRM_ERROR("Switching back to LCPLL failed\n"); > } > -- > 1.8.4.rc3 > -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx