On Wed, Mar 01, 2023 at 05:21:10PM +0200, Jani Nikula wrote:
> On Wed, 01 Mar 2023, "Hogander, Jouni" <jouni.hogander@xxxxxxxxx> wrote:
> > On Mon, 2023-02-20 at 18:47 +0200, Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >>
> >> Grab the HDR DPCD refresh timeout (time we need to wait after
> >> writing the sourc OUI before the HDR DPCD registers are ready)
> >> from the VBT.
> >>
> >> Windows doesn't even seem to have any default value for this,
> >> which is perhaps a bit weird since the VBT value is documented
> >> as TGL+ and I thought the HDR backlight stuff might already be
> >> used on earlier platforms. To play it safe I left the old
> >> hardcoded 30ms default in place. Digging through some internal
> >> stuff that seems to have been a number given by the vendor for
> >> one particularly slow TCON. Although I did see 50ms mentioned
> >> somewhere as well.
> >>
> >> Let's also include the value in the debug print to ease
> >> debugging, and toss in the customary connector id+name as well.
> >>
> >> The TGL Thinkpad T14 I have sets this to 0 btw. So the delay
> >> is now gone on this machine:
> >> [CONNECTOR:308:eDP-1] Detected Intel HDR backlight interface version
> >> 1
> >> [CONNECTOR:308:eDP-1] Using Intel proprietary eDP backlight controls
> >> [CONNECTOR:308:eDP-1] SDR backlight is controlled through PWM
> >> [CONNECTOR:308:eDP-1] Using native PCH PWM for backlight control
> >> (controller=0)
> >> [CONNECTOR:308:eDP-1] Using AUX HDR interface for backlight control
> >> (range 0..496)
> >> [CONNECTOR:308:eDP-1] Performing OUI wait (0 ms)
> >
> > Reviewed-by: Jouni Högander <jouni.hogander@xxxxxxxxx>
>
> Cc: stable@xxxxxxxxxxxxxxx
>
> ?
Not aware of anythigng actually getting fixed by this. I suspect
it's usually more of an optimization since the original 30ms was
supposedly only needed by some especially slow TCONs.
>
> >
> >>
> >> Cc: Lyude Paul <lyude@xxxxxxxxxx>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_bios.c | 6 ++++++
> >> drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
> >> drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++--
> >> 3 files changed, 14 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> >> b/drivers/gpu/drm/i915/display/intel_bios.c
> >> index f35ef3675d39..f16887aed56d 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> >> @@ -1084,6 +1084,12 @@ parse_lfp_backlight(struct drm_i915_private
> >> *i915,
> >> panel->vbt.backlight.min_brightness = entry-
> >> >min_brightness;
> >> }
> >>
> >> + if (i915->display.vbt.version >= 239)
> >> + panel->vbt.backlight.hdr_dpcd_refresh_timeout =
> >> + DIV_ROUND_UP(backlight_data-
> >> >hdr_dpcd_refresh_timeout[panel_type], 100);
> >> + else
> >> + panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
> >> +
> >> drm_dbg_kms(&i915->drm,
> >> "VBT backlight PWM modulation frequency %u Hz, "
> >> "active %s, min brightness %u, level %u,
> >> controller %u\n",
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> index 748b0cd411fa..76f47ba3be45 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> >> @@ -326,6 +326,7 @@ struct intel_vbt_panel_data {
> >> struct {
> >> u16 pwm_freq_hz;
> >> u16 brightness_precision_bits;
> >> + u16 hdr_dpcd_refresh_timeout;
> >> bool present;
> >> bool active_low_pwm;
> >> u8 min_brightness; /* min_brightness/255 of max
> >> */
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> >> b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index b77bd4565864..3734e7567230 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -2293,10 +2293,15 @@ intel_edp_init_source_oui(struct intel_dp
> >> *intel_dp, bool careful)
> >>
> >> void intel_dp_wait_source_oui(struct intel_dp *intel_dp)
> >> {
> >> + struct intel_connector *connector = intel_dp-
> >> >attached_connector;
> >> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> >>
> >> - drm_dbg_kms(&i915->drm, "Performing OUI wait\n");
> >> - wait_remaining_ms_from_jiffies(intel_dp->last_oui_write, 30);
> >> + drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Performing OUI
> >> wait (%u ms)\n",
> >> + connector->base.base.id, connector->base.name,
> >> + connector-
> >> >panel.vbt.backlight.hdr_dpcd_refresh_timeout);
> >> +
> >> + wait_remaining_ms_from_jiffies(intel_dp->last_oui_write,
> >> + connector-
> >> >panel.vbt.backlight.hdr_dpcd_refresh_timeout);
> >> }
> >>
> >> /* If the device supports it, try to set the power state
> >> appropriately */
> >
>
> --
> Jani Nikula, Intel Open Source Graphics Center
--
Ville Syrjälä
Intel
