On Sun, Aug 11, 2013 at 11:17:28PM +0100, Chris Wilson wrote: > For unfathomable reasons this alignment appears to be required for tiled > scanouts being read from stolen memory. I can find no reference in the > w/a db to support this requirement, but the evidence of my own eyes says > this prevents many headaches. > > Note that I have not tricked anything older than Sandybridge into using > stolen tiled scanouts, so the extra alignment may be required there as > well. Strange. I can't find anything except async flips and vt-d which would require 256k alignment. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 6b7ce06..a7573f2 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1848,6 +1848,8 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, > case I915_TILING_X: > /* pin() will align the object as required by fence */ > alignment = 0; > + if (obj->stolen && INTEL_INFO(dev)->gen >= 6) > + alignment = 256 * 1024; > break; > case I915_TILING_Y: > /* Despite that we check this in framebuffer_init userspace can > -- > 1.8.4.rc2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
