On Thu, Aug 08, 2013 at 02:41:11PM +0100, Chris Wilson wrote:
> This is primarily for the benefit of the create2 ioctl so that the
> caller can avoid the later step of rebinding the bo with new PTE bits.
> After introducing WT (and possibly GFDT) cacheing for display targets,
> not everything in the display is earmarked as UC, and more importantly
> what is is controlled by the kernel.
>
> Note that set_cache_level/get_cache_level for DISPLAY is not necessarily
> idempotent; get_cache_level may return UC for architectures that have no
> special cache domain for the display engine.
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
You know the drill: A bit of igt testcoverage would be neat, I think
simply adding the display domain everywhere we test uncached/snooped
already should be more than good enough. So I'll punt on this one here for
now, all other patches (with the exception of the hw context from stolen
one) are merged to dinq.
Thanks, Daniel
> ---
> drivers/gpu/drm/i915/i915_gem.c | 7 +++++++
> include/uapi/drm/i915_drm.h | 1 +
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 2b897f2..e68a129 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3557,6 +3557,10 @@ int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
> args->caching = I915_CACHING_CACHED;
> break;
>
> + case I915_CACHE_WT:
> + args->caching = I915_CACHING_DISPLAY;
> + break;
> +
> default:
> args->caching = I915_CACHING_NONE;
> break;
> @@ -3583,6 +3587,9 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
> case I915_CACHING_CACHED:
> level = I915_CACHE_LLC;
> break;
> + case I915_CACHING_DISPLAY:
> + level = HAS_WT(dev) ? I915_CACHE_WT : I915_CACHE_NONE;
> + break;
> default:
> return -EINVAL;
> }
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 39d14b3..40582e5 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -853,6 +853,7 @@ struct drm_i915_gem_busy {
>
> #define I915_CACHING_NONE 0
> #define I915_CACHING_CACHED 1
> +#define I915_CACHING_DISPLAY 2
>
> struct drm_i915_gem_caching {
> /**
> --
> 1.8.4.rc1
>
> _______________________________________________
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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