> -----Original Message-----
> From: Nikula, Jani <jani.nikula@xxxxxxxxx>
> Sent: Monday, January 9, 2023 11:50 AM
> To: Kahola, Mika <mika.kahola@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deak, Imre <imre.deak@xxxxxxxxx>; Sripada, Radhakrishna
> <radhakrishna.sripada@xxxxxxxxx>; Kahola, Mika <mika.kahola@xxxxxxxxx>;
> Shankar, Uma <uma.shankar@xxxxxxxxx>
> Subject: Re: [PATCH v2 04/21] drm/i915/mtl: Add Support for C10 PHY message
> bus and pll programming
>
> On Thu, 05 Jan 2023, Mika Kahola <mika.kahola@xxxxxxxxx> wrote:
> > +static int intel_cx0_wait_for_ack(struct drm_i915_private *i915, enum
> > +port port, int lane, u32 *val) {
> > + enum phy phy = intel_port_to_phy(i915, port);
> > +
> > + if (__intel_wait_for_register(&i915->uncore,
>
> There's now an __intel_de_ variant of this that should be used within display/.
Ah, ok. I will check that one out and switch to use that. Thanks!
-Mika-
>
> BR,
> Jani.
>
>
> --
> Jani Nikula, Intel Open Source Graphics Center
