On Tue, Jul 30, 2013 at 10:30:41AM +0100, Chris Wilson wrote: > On Mon, Jul 29, 2013 at 05:48:24PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > > > If we're already allowing PC8, just don't use the IRQs, so we won't > > need to wake from PC8. Waking up from PC8 is a slow thing, so avoid it > > when we can. > > You would also need to explain that the GMBUS is outside of the display > power well. > > Looks reasonable, the only bit is moving the read of forbid_count into > hsw_pc8_enabled() so that the gmbus code isn't poking around with > someone else's locks, and we can safely do an unlocked optimistic read > here. IIrc EDID reads with interrupts take 22ms, without them they can easily take 100ms. Is pc8+ exit indeed longer than that difference? If the issue is that we flip-flop between pc8+ allow/deny too often then we could just add a slight delay. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
