On Fri, Aug 2, 2013 at 12:56 AM, Ben Widawsky <ben@xxxxxxxxxxxx> wrote: > The default LLC age was changed: > commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d > Author: Ben Widawsky <benjamin.widawsky@xxxxxxxxx> > Date: Thu Jul 4 11:02:03 2013 -0700 > > drm/i915/hsw: Set correct Haswell PTE encodings. > > This caused a regression in performance on certain benchmarks. While I > think a discussion still needs to happen about how the kernel should > default for both eLLC, and LLC - just revert this behavior for now. > > v2: Drop the extra #define (Chad) > > v3: Actually git add > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67062 > Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> > Reviewed-by: Chad Versace <chad.versace@xxxxxxxxxxxxxxx> iris_pte_encode was split up after the regressing commit in commit 4d15c145a6234d999c0452eec0d275c1fbf0688c Author: Ben Widawsky <ben@xxxxxxxxxxxx> Date: Thu Jul 4 11:02:06 2013 -0700 drm/i915: Use eLLC/LLC by default when available Hence I think that one should be patched, too (QA doesn't have an iris machine afaik, so no regression report expected). And since I have some open questions about Chris WT-for-Iris patch too I think it's best to spin a v4 of this one here. -Daniel > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index e7b4204..3e7f124 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -52,6 +52,7 @@ > */ > #define HSW_CACHEABILITY_CONTROL(bits) ((((bits) & 0x7) << 1) | \ > (((bits) & 0x8) << (11 - 3))) > +#define HSW_WB_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x2) > #define HSW_WB_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x3) > #define HSW_WB_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0xb) > > @@ -105,7 +106,7 @@ static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr, > pte |= HSW_PTE_ADDR_ENCODE(addr); > > if (level != I915_CACHE_NONE) > - pte |= HSW_WB_LLC_AGE0; > + pte |= HSW_WB_LLC_AGE3; > > return pte; > } > -- > 1.8.3.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
