On Thu, 10 Nov 2022, Swati Sharma <swati2.sharma@xxxxxxxxx> wrote:
> Use HAS_DSC(__i915) wrapper containing runtime info of has_dsc
> member. Platforms supporting dsc has this flag enabled; no need of
> DISPLAY_VER() check.
>
> Also, simplified intel_dsc_source_support() based on above changes.
>
> Suggested-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> Signed-off-by: Swati Sharma <swati2.sharma@xxxxxxxxx>
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_vdsc.c | 11 ++++-------
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> 3 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7400d6b4c587..f6f9257bd202 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> * Output bpp is stored in 6.4 format so right shift by 4 to get the
> * integer value since we support only integer values of bpp.
> */
> - if (DISPLAY_VER(dev_priv) >= 10 &&
> + if (HAS_DSC(dev_priv) &&
> drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {
> /*
> * TBD pass the connector BPC,
> @@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
> intel_dp_set_max_sink_lane_count(intel_dp);
>
> /* Read the eDP DSC DPCD registers */
> - if (DISPLAY_VER(dev_priv) >= 10)
> + if (HAS_DSC(dev_priv))
> intel_dp_get_dsc_sink_cap(intel_dp);
>
> /*
> @@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector,
> }
>
> /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */
> - if (DISPLAY_VER(dev_priv) >= 11)
> + if (HAS_DSC(dev_priv))
> intel_dp_get_dsc_sink_cap(intel_dp);
>
> intel_dp_configure_mst(intel_dp);
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 269f9792390d..7b4d300a4dd8 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -344,16 +344,13 @@ bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state)
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>
> - if (!RUNTIME_INFO(i915)->has_dsc)
> + if (!HAS_DSC(i915))
> return false;
>
> - if (DISPLAY_VER(i915) >= 12)
> - return true;
> -
> - if (DISPLAY_VER(i915) >= 11 && cpu_transcoder != TRANSCODER_A)
> - return true;
> + if (DISPLAY_VER(i915) == 11 && cpu_transcoder == TRANSCODER_A)
> + return false;
>
> - return false;
> + return true;
> }
>
> static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 05b3300cc4ed..9d1fe5d6a104 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -484,6 +484,7 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
> #define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision)
>
> #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb)
> +#define HAS_DSC(__i915) (RUNTIME_INFO(__i915)->has_dsc)
>
> #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
> #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step)
--
Jani Nikula, Intel Open Source Graphics Center
