2013/7/5 <ville.syrjala@xxxxxxxxxxxxxxx>:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> SNB and IVB have slightly a different way to read out the
> watermark latency values.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a2ca018..6ff89c6 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -2350,6 +2350,13 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
> wm[2] = (sskpd >> 12) & 0xFF;
> wm[3] = (sskpd >> 20) & 0x1FF;
> wm[4] = (sskpd >> 32) & 0x1FF;
> + } else if (INTEL_INFO(dev)->gen >= 6) {
> + uint32_t sskpd = I915_READ(MCH_SSKPD);
> +
> + wm[0] = (sskpd >> SSKPD_WM0_SHIFT) & SSKPD_WM_MASK;
> + wm[1] = (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK;
> + wm[2] = (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK;
> + wm[3] = (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK;
My documentation is limited, but this seems at least consistent with
our current definitions.
I'd also vote to transform this into a "switch (INTEL_INFO(dev))" and
add a WARN in case Gen is not 6 or 7.
Anyway, the patch looks correct: Reviewed-by: Paulo Zanoni
<paulo.r.zanoni@xxxxxxxxx>
> }
> }
>
> --
> 1.8.1.5
>
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--
Paulo Zanoni
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