2013/7/5 <ville.syrjala@xxxxxxxxxxxxxxx>: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > The FBC watermark doesn't depend on the latency value, so no point in > passing it in. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> /me hides from the git blame It does depend, but indirectly, through pri_val :P Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index f178e26..981416c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -2245,8 +2245,7 @@ static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params, > > /* Only for WM_LP. */ > static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params, > - uint32_t pri_val, > - uint32_t mem_value) > + uint32_t pri_val) > { > if (!params->active) > return 0; > @@ -2269,7 +2268,7 @@ static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max, > pri_val[pipe] = ilk_compute_pri_wm(p, mem_value, 1); > spr_val[pipe] = ilk_compute_spr_wm(p, mem_value); > cur_val[pipe] = ilk_compute_cur_wm(p, mem_value); > - fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe], mem_value); > + fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe]); > } > > result->pri_val = max3(pri_val[0], pri_val[1], pri_val[2]); > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Paulo Zanoni _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx