On Fri, Jul 26, 2013 at 01:21:48PM +0300, Jani Nikula wrote: > On Fri, 26 Jul 2013, Daniel Vetter <daniel.vetter@xxxxxxxx> wrote: > > Apparently Bspec is wrong in this case here even for gm45. Note that > > Bspec is horribly misguided on i965g/gm, so we don't have any other > > data points besides that it seems to make machines work better. > > > > With this changes all the bits in PORT_HOTPLUG_STAT for the digital > > ports are ordered the same way. This seems to agree with what register > > dumps from the hpd storm handling code shows, where the LIVE bit and > > the short/long pulse STATUS bits light up at the same time with this > > enumeration (but no with the one from Bspec). > > Would a comment about this near the #defines be in order? To avoid the > "these values are all wrong per bspec" patches. Yeah, good idea, I'll add a comment when merging this. -Daniel > > Cheers, > Jani. > > > Also tested on my gm45 which has two DP+ ports, and everything seems > > to still work as expected. > > > > References: http://www.mail-archive.com/intel-gfx@xxxxxxxxxxxxxxxxxxxxx/msg23054.html > > Cc: Egbert Eich <eich@xxxxxxxx> > > Cc: Jan Niggemann <jn@xxxxxx> > > Tested-by: Jan Niggemann <jn@xxxxxx> > > Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > > --- > > drivers/gpu/drm/i915/i915_reg.h | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 6caa748..2d4c884 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -1925,9 +1925,9 @@ > > > > #define PORT_HOTPLUG_STAT (dev_priv->info->display_mmio_offset + 0x61114) > > /* HDMI/DP bits are gen4+ */ > > -#define PORTB_HOTPLUG_LIVE_STATUS (1 << 29) > > +#define PORTD_HOTPLUG_LIVE_STATUS (1 << 29) > > #define PORTC_HOTPLUG_LIVE_STATUS (1 << 28) > > -#define PORTD_HOTPLUG_LIVE_STATUS (1 << 27) > > +#define PORTB_HOTPLUG_LIVE_STATUS (1 << 27) > > #define PORTD_HOTPLUG_INT_STATUS (3 << 21) > > #define PORTC_HOTPLUG_INT_STATUS (3 << 19) > > #define PORTB_HOTPLUG_INT_STATUS (3 << 17) > > -- > > 1.8.3.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Jani Nikula, Intel Open Source Technology Center -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
