This series fixes issues faced when an HDMI2.1 sink that does not
support DSC is connected via HDMI2.1PCON. It also includes other minor
HDMI2.1 PCON fixes/refactoring.
Patch 1-2 Have minor fixes/cleanups.
Patch 3-6 Pull the decision making to use DFP conversion capabilities
for every mode during compute config, instead of having that decision
during DP initializing phase.
Patch 7-8 Calculate the max BPC that can be sufficient with either
RGB or YCbcr420 format for the maximum FRL rate supported.
Rev2: Split the refactoring of DFP RG->YCBCR conversion into smaller
patches, as suggested by Jani N.
Also dropped the unnecessary helper for DSC1.2 support for HDMI2.1 DFP.
Rev3: As suggested by Ville, added new member sink_format to store the
final format that the sink will be using, which might be different
than the output format, and thus might need color/format conversion
performed by the PCON.
Ankit Nautiyal (8):
drm/i915/dp: Reset frl trained flag before restarting FRL training
drm/i915/dp: Remove whitespace at the end of function.
drm/i915/display: Add new member to configure PCON color conversion
drm/i915/display: Add new member in intel_dp to store ycbcr420
passthrough cap
drm/i915/dp: Use sink_format in dp_is_ycbcr420
drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state
sink_format
drm/i915/dp: Handle BPP where HDMI2.1 DFP doesn't support DSC
drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP
drivers/gpu/drm/i915/display/icl_dsi.c | 1 +
drivers/gpu/drm/i915/display/intel_crt.c | 1 +
.../drm/i915/display/intel_crtc_state_dump.c | 5 +-
.../drm/i915/display/intel_display_types.h | 4 +
drivers/gpu/drm/i915/display/intel_dp.c | 246 ++++++++++++++----
drivers/gpu/drm/i915/display/intel_dp_mst.c | 1 +
drivers/gpu/drm/i915/display/intel_dvo.c | 1 +
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +
drivers/gpu/drm/i915/display/intel_lvds.c | 1 +
drivers/gpu/drm/i915/display/intel_tv.c | 1 +
drivers/gpu/drm/i915/display/vlv_dsi.c | 1 +
11 files changed, 206 insertions(+), 59 deletions(-)
--
2.25.1
