On Thu, Jul 25, 2013 at 10:06:50AM -0700, Jesse Barnes wrote:
> Art confirms that this should work fine. Since most panels are 18bpp
> with dithering from 24bpp, the existing code wouldn't be enabled in most
> cases.
>
> Signed-off-by: Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 12ea1a9..7cf475b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4091,7 +4091,7 @@ static void hsw_compute_ips_config(struct intel_crtc *crtc,
> {
> pipe_config->ips_enabled = i915_enable_ips &&
> hsw_crtc_supports_ips(crtc) &&
> - pipe_config->pipe_bpp == 24;
> + pipe_config->pipe_bpp <= 24;
Don't you want to check that the incoming fb is depth 24?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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