Re: i915 irq storm mitigation in 3.10

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On Thu, Jul 25, 2013 at 9:50 AM, Egbert Eich <eich@xxxxxxxx> wrote:
>  > I applied this patch (but not the one you sent on Monday), recompiled
>  > and logged:
>  > uncompressed (8,2M) http://files.hz6.de/kern_20130724.log
>  > bz2 (288 KB) http://files.hz6.de/kern_20130724.log.bz2
>
> These logs show clearly that we are seeing interrupts which
> should be disabled.
> Could it be that we we have either the status or enable bits
> mixed up? Unfortunately the publically available docs for GEN4
> don't show the HOTPLUG_EN and HOTPLUG_STAT registers.
>
> Daniel, could you please help me out here?

I've checked the docs again for gm45 and we seem to have the right
values. But on early gen4 (i.e. i965g/gm) the Bspec has been wrong
about these, so I wouldn't be surprised at all if they're wrong for
the digital ports on gm45, too.

Iirc we've already had a case like that, but there was no real
conclusion (and atm I can't find the bug). Can you pls try the below
patch (on top of Egbert's debug stuff)?

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6caa748..2d4c884 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1925,9 +1925,9 @@

 #define PORT_HOTPLUG_STAT      (dev_priv->info->display_mmio_offset + 0x61114)
 /* HDMI/DP bits are gen4+ */
-#define   PORTB_HOTPLUG_LIVE_STATUS               (1 << 29)
+#define   PORTD_HOTPLUG_LIVE_STATUS               (1 << 29)
 #define   PORTC_HOTPLUG_LIVE_STATUS               (1 << 28)
-#define   PORTD_HOTPLUG_LIVE_STATUS               (1 << 27)
+#define   PORTB_HOTPLUG_LIVE_STATUS               (1 << 27)
 #define   PORTD_HOTPLUG_INT_STATUS             (3 << 21)
 #define   PORTC_HOTPLUG_INT_STATUS             (3 << 19)
 #define   PORTB_HOTPLUG_INT_STATUS             (3 << 17)


Egbert I think your debug patch has fairly useful information for
debugging the storm code in general, can you please submit a patch
against drm-intel-nightly?

Thanks, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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