Paulo Zanoni <przanoni@xxxxxxxxx> writes:
> From: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
>
> The IVB funtions are exactly the same as the ILK ones, with the
> exception of the bit register. So add IVB/HSW support to
> ironlake_enable_vblank and ironlake_disable_vblank, then kill the
> ivybridge functions.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 41 ++++++++---------------------------------
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 2 files changed, 11 insertions(+), 33 deletions(-)
>
> This replaces patches 8 and 9 from the series. I'm not really sure what Chris
> had in mind when he mentioned I could be a little more creative, so this is my
> attempt.
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index f54a02b..d084057 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1663,29 +1663,14 @@ static int ironlake_enable_vblank(struct drm_device *dev, int pipe)
> {
> drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> unsigned long irqflags;
> + uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
> + DE_PIPE_VBLANK_ILK(pipe);
>
> if (!i915_pipe_enabled(dev, pipe))
> return -EINVAL;
>
> spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> - ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
> - DE_PIPEA_VBLANK : DE_PIPEB_VBLANK);
> - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> -
> - return 0;
> -}
> -
> -static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
> -{
> - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> - unsigned long irqflags;
> -
> - if (!i915_pipe_enabled(dev, pipe))
> - return -EINVAL;
> -
> - spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> - ironlake_enable_display_irq(dev_priv,
> - DE_PIPEA_VBLANK_IVB << (5 * pipe));
> + ironlake_enable_display_irq(dev_priv, bit);
> spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
>
> return 0;
> @@ -1736,21 +1721,11 @@ static void ironlake_disable_vblank(struct drm_device *dev, int pipe)
> {
> drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> unsigned long irqflags;
> + uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
> + DE_PIPE_VBLANK_ILK(pipe);
>
> spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> - ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
> - DE_PIPEA_VBLANK : DE_PIPEB_VBLANK);
> - spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> -}
> -
> -static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
> -{
> - drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
> - ironlake_disable_display_irq(dev_priv,
> - DE_PIPEA_VBLANK_IVB << (pipe * 5));
> + ironlake_disable_display_irq(dev_priv, bit);
> spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> }
>
> @@ -3067,8 +3042,8 @@ void intel_irq_init(struct drm_device *dev)
> dev->driver->irq_preinstall = ironlake_irq_preinstall;
> dev->driver->irq_postinstall = ivybridge_irq_postinstall;
> dev->driver->irq_uninstall = ironlake_irq_uninstall;
> - dev->driver->enable_vblank = ivybridge_enable_vblank;
> - dev->driver->disable_vblank = ivybridge_disable_vblank;
> + dev->driver->enable_vblank = ironlake_enable_vblank;
> + dev->driver->disable_vblank = ironlake_disable_vblank;
> dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
> } else if (HAS_PCH_SPLIT(dev)) {
> dev->driver->irq_handler = ironlake_irq_handler;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9556dff..dd2306e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3729,6 +3729,9 @@
> #define DE_PLANEA_FLIP_DONE_IVB (1<<3)
> #define DE_PIPEA_VBLANK_IVB (1<<0)
>
> +#define DE_PIPE_VBLANK_ILK(pipe) (1 << ((pipe * 8) + 7))
> +#define DE_PIPE_VBLANK_IVB(pipe) (1 << (pipe * 5))
> +
> #define VLV_MASTER_IER 0x4400c /* Gunit master IER */
> #define MASTER_INTERRUPT_ENABLE (1<<31)
>
> --
> 1.8.1.2
>
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