[PATCH] drm/i915: Preserve the DDI_A_4_LANES bit from the bios

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2013/7/12 Paulo Zanoni <przanoni at gmail.com>:
> 2013/7/12 St?phane Marchesin <marcheu at chromium.org>:
>> Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
>> on eDP. This fixes eDP on hsw with > 2 lanes.
>>
>> Also s/port_reversal/saved_port_bits/ since the current name is
>> confusing.
>>
>> Signed-off-by: St?phane Marchesin <marcheu at chromium.org>
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> Should we also Cc: stable at kernel.org ?

And I forgot to mention: as discussed on IRC, we need 2 additional
patches on top of that:
- Don't intel_init_crt if DDI A has 4 lanes
- We should do our own wrapper around drm_dp_max_lane_count and return
minimum of drm_dp_max_lane_count and the value set on DDI_BUF_CTL_A

>
>> ---
>>  drivers/gpu/drm/i915/intel_ddi.c | 10 ++++++----
>>  drivers/gpu/drm/i915/intel_drv.h |  2 +-
>>  2 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index 324211a..b042ee5 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -301,7 +301,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
>>                 struct intel_digital_port *intel_dig_port =
>>                         enc_to_dig_port(encoder);
>>
>> -               intel_dp->DP = intel_dig_port->port_reversal |
>> +               intel_dp->DP = intel_dig_port->saved_port_bits |
>>                                DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
>>                 intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
>>
>> @@ -1109,7 +1109,8 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
>>                  * enabling the port.
>>                  */
>>                 I915_WRITE(DDI_BUF_CTL(port),
>> -                          intel_dig_port->port_reversal | DDI_BUF_CTL_ENABLE);
>> +                          intel_dig_port->saved_port_bits |
>> +                          DDI_BUF_CTL_ENABLE);
>>         } else if (type == INTEL_OUTPUT_EDP) {
>>                 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>>
>> @@ -1347,8 +1348,9 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
>>         intel_encoder->get_config = intel_ddi_get_config;
>>
>>         intel_dig_port->port = port;
>> -       intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) &
>> -                                       DDI_BUF_PORT_REVERSAL;
>> +       intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
>> +                                         (DDI_BUF_PORT_REVERSAL |
>> +                                          DDI_A_4_LANES);
>>         intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
>>
>>         intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index c8c9b6f..b7d6e09 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -504,7 +504,7 @@ struct intel_dp {
>>  struct intel_digital_port {
>>         struct intel_encoder base;
>>         enum port port;
>> -       u32 port_reversal;
>> +       u32 saved_port_bits;
>>         struct intel_dp dp;
>>         struct intel_hdmi hdmi;
>>  };
>> --
>> 1.8.3
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx at lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni



-- 
Paulo Zanoni


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