On Fri, Jul 12, 2013 at 01:25:27PM -0700, Ben Widawsky wrote: > On Fri, Jul 12, 2013 at 03:02:32PM +0100, Chris Wilson wrote: > > The GT functions for enabling register access also need to occasionally > > write to and read from registers. To avoid the potential recursion as we > > modify the public interface to be stricter, introduce a private register > > access API for the GT functions. > > > > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk> > > --- > > drivers/gpu/drm/i915/intel_gt.c | 92 +++++++++++++++++++++++++---------------- > > 1 file changed, 56 insertions(+), 36 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_gt.c b/drivers/gpu/drm/i915/intel_gt.c > > index 060e256..cb3116c 100644 > > --- a/drivers/gpu/drm/i915/intel_gt.c > > +++ b/drivers/gpu/drm/i915/intel_gt.c > > @@ -26,6 +26,19 @@ > > > > #define FORCEWAKE_ACK_TIMEOUT_MS 2 > > > > +#define __raw_i915_read8(dev_priv__, reg__) readb((dev_priv__)->regs + (reg__)) > > +#define __raw_i915_write8(dev_priv__, reg__, val__) writeb(val__, (dev_priv__)->regs + (reg__)) > > + > > +#define __raw_i915_read16(dev_priv__, reg__) readw((dev_priv__)->regs + (reg__)) > > +#define __raw_i915_write16(dev_priv__, reg__, val__) writew(val__, (dev_priv__)->regs + (reg__)) > > + > > +#define __raw_i915_read32(dev_priv__, reg__) readl((dev_priv__)->regs + (reg__)) > > +#define __raw_i915_write32(dev_priv__, reg__, val__) writel(val__, (dev_priv__)->regs + (reg__)) > > Instead of what you did, I would have preferred > #define __raw_posting_read In hindsight, I agree with using __raw_posting_read. Thanks, -Chris -- Chris Wilson, Intel Open Source Technology Centre
