From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
The VBT gained some bits to inidicate the max FRL rate for
HDMI 2.1, define them.
These just outright replaced the slave_port bits for ganged eDP.
Apparently that feature was never actually used so someone decided
that reusing the bits is fine. Although the actual ganged eDP
enable bit was still left defined elsewhere for some reason.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index b15e29509fac..8bdb533b5304 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -412,8 +412,10 @@ struct child_device_config {
u8 reserved2:3;
u8 compression_structure_index:4; /* 198+ */
u8 reserved3:4;
- u8 slave_port; /* 202+ */
- u8 reserved4;
+ u8 hdmi_max_frl_rate:4; /* 237+ */
+ u8 hdmi_max_frl_rate_valid:1; /* 237+ */
+ u8 reserved4:3; /* 237+ */
+ u8 reserved5;
} __packed;
} __packed;
--
2.35.1
